Low-latency C++, order books, and algorithmic trading.
3 published across 1 topics.
Bypass networking, memory arenas, and cache line optimization.
A general-purpose allocator is adaptive, so its cost varies - cache hits, contention on a shared structure, page faults on new memory, occasional housekeeping - and the rare expensive path is your tail. An arena makes allocation a pointer bump, paid for with fixed capacity and manual lifetime discipline.
They are false sharing: both counters sit in one cache line, so each write invalidates the other core's copy and the line ping-pongs between caches. You fix it by aligning each hot field to its own line, at the cost of footprint, and only where a hardware counter says so. It also connects cache lines to the point an interviewer is testing.
Kernel bypass moves packet handling into user space so a market-data read no longer pays a syscall boundary, a kernel-to-user copy, interrupt and softirq handling, or a scheduler wakeup. You pay for it with a core burned on busy-polling, the loss of standard network tooling, and a driver-specific build. It also connects networking to the point an interviewer is testing.