Verilog, FPGA, and ASIC design loops.
Treat it as a process gap, not a grudge. Find out where and when decisions are made, get your team's constraints in front of the deciders before the meeting through short written proposals with a comment window both time zones can reach, and escalate a specific costly decision, not the people who made it.
In a transfer, atomicity means the debit and credit commit together or not at all, consistency means declared constraints such as a non-negative balance still hold, isolation stops concurrent transactions seeing or overwriting each other's half-done work, and durability means a confirmed commit survives a crash.
Deadlock needs all four Coffman conditions at once: mutual exclusion, hold and wait, no preemption and circular wait. Breaking any one prevents it, and the practical choice is usually circular wait, by making every thread take locks in one global order.
OOP examples beat definitions: a class refusing a bad withdrawal shows encapsulation, a caller depending on an interface shows abstraction, a subclass reusing a parent method shows inheritance, and one loop running different overrides shows polymorphism. Inheritance is wrong when the child breaks a parent promise.
Describe your use of AI tools by task, each with its check: reading cited lines, running code, confirming APIs against the docs for your version. Refuse any answer you cannot check cheaply or that is costly to get wrong, keep restricted data out of unapproved tools, and back it with one real catch.
Normalise by naming each functional dependency and splitting on it: atomic values for 1NF, no column depending on part of a composite key for 2NF, no non-key column depending on another for 3NF. Undo it only for a measured read path, and say who keeps the copies in step.